%0 Conference Paper %1 conf/isqed/LiSH19 %A Li, Chaofan %A Sapatnekar, Sachin S. %A Hu, Jiang %B ISQED %D 2019 %I IEEE %K dblp %P 33-38 %T Fast Mapping-Based High-Level Synthesis of Pipelined Circuits. %U http://dblp.uni-trier.de/db/conf/isqed/isqed2019.html#LiSH19 %@ 978-1-7281-0392-1

@inproceedings{conf/isqed/LiSH19, added-at = {2019-05-04T00:00:00.000+0200}, author = {Li, Chaofan and Sapatnekar, Sachin S. and Hu, Jiang}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2f2b776741ca5d513d5159ad8e0212866/dblp}, booktitle = {ISQED}, crossref = {conf/isqed/2019}, ee = {https://doi.org/10.1109/ISQED.2019.8697596}, interhash = {58ac04a5f913c3e8aa41cc3e54dc7fe9}, intrahash = {f2b776741ca5d513d5159ad8e0212866}, isbn = {978-1-7281-0392-1}, keywords = {dblp}, pages = {33-38}, publisher = {IEEE}, timestamp = {2019-09-27T17:23:43.000+0200}, title = {Fast Mapping-Based High-Level Synthesis of Pipelined Circuits.}, url = {http://dblp.uni-trier.de/db/conf/isqed/isqed2019.html#LiSH19}, year = 2019 }