%0 Conference Paper %1 conf/vlsi/SchiavoneSRMZHB18 %A Schiavone, Pasquale Davide %A Sánchez, Ernesto %A Ruospo, Annachiara %A Minervini, Francesco %A Zaruba, Florian %A Haugou, Germain %A Benini, Luca %B VLSI-SoC %D 2018 %I IEEE %K dblp %P 43-48 %T An Open-Source Verification Framework for Open-Source Cores: A RISC-V Case Study. %U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2018.html#SchiavoneSRMZHB18 %@ 978-1-5386-4756-1

@inproceedings{conf/vlsi/SchiavoneSRMZHB18, added-at = {2019-02-26T00:00:00.000+0100}, author = {Schiavone, Pasquale Davide and Sánchez, Ernesto and Ruospo, Annachiara and Minervini, Francesco and Zaruba, Florian and Haugou, Germain and Benini, Luca}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d5a3ccbc473e388945baa9fe52908956/dblp}, booktitle = {VLSI-SoC}, crossref = {conf/vlsi/2018soc}, ee = {https://doi.org/10.1109/VLSI-SoC.2018.8644818}, interhash = {54e84784620cd3e70e107cfa7c961035}, intrahash = {d5a3ccbc473e388945baa9fe52908956}, isbn = {978-1-5386-4756-1}, keywords = {dblp}, pages = {43-48}, publisher = {IEEE}, timestamp = {2019-09-27T13:22:46.000+0200}, title = {An Open-Source Verification Framework for Open-Source Cores: A RISC-V Case Study.}, url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2018.html#SchiavoneSRMZHB18}, year = 2018 }