%0 Conference Paper %1 conf/aspdac/IkedaKLIIM14 %A Ikeda, Sho %A Kamimura, Tatsuya %A yeop Lee, Sang %A Ito, Hiroyuki %A Ishihara, Noboru %A Masu, Kazuya %B ASP-DAC %D 2014 %I IEEE %K dblp %P 23-24 %T A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2014.html#IkedaKLIIM14 %@ 978-1-4799-2816-3

@inproceedings{conf/aspdac/IkedaKLIIM14, added-at = {2014-02-25T00:00:00.000+0100}, author = {Ikeda, Sho and Kamimura, Tatsuya and yeop Lee, Sang and Ito, Hiroyuki and Ishihara, Noboru and Masu, Kazuya}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2db263e4c9939760195915214ebfe53fe/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2014}, ee = {http://dx.doi.org/10.1109/ASPDAC.2014.6742855}, interhash = {5185f8effbdff4f8daf9996dc5e28b16}, intrahash = {db263e4c9939760195915214ebfe53fe}, isbn = {978-1-4799-2816-3}, keywords = {dblp}, pages = {23-24}, publisher = {IEEE}, timestamp = {2016-05-21T09:46:07.000+0200}, title = {A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2014.html#IkedaKLIIM14}, year = 2014 }