%0 Conference Paper %1 conf/fpt/LeeS04 %A Lee, Justin %A Sitte, Joaquin %B FPT %D 2004 %E Diessel, Oliver %E Williams, John %I IEEE %K dblp %P 113-119 %T A gate-level model for morphogenetic evolvable hardware. %U http://dblp.uni-trier.de/db/conf/fpt/fpt2004.html#LeeS04

@inproceedings{conf/fpt/LeeS04, added-at = {2017-05-24T00:00:00.000+0200}, author = {Lee, Justin and Sitte, Joaquin}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2ee1ba3aac15b9c88a37c6b66e39ebf84/dblp}, booktitle = {FPT}, crossref = {conf/fpt/2004}, editor = {Diessel, Oliver and Williams, John}, ee = {https://doi.org/10.1109/FPT.2004.1393258}, interhash = {42c99d4e890aa13c82cd8c8f2584ef1e}, intrahash = {ee1ba3aac15b9c88a37c6b66e39ebf84}, keywords = {dblp}, pages = {113-119}, publisher = {IEEE}, timestamp = {2019-11-26T08:04:11.000+0100}, title = {A gate-level model for morphogenetic evolvable hardware.}, url = {http://dblp.uni-trier.de/db/conf/fpt/fpt2004.html#LeeS04}, year = 2004 }