%0 Conference Paper %1 conf/iscas/SadhuH10 %A Sadhu, Bodhisatwa %A Harjani, Ramesh %B ISCAS %D 2010 %I IEEE %K dblp %P 1975-1978 %T Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%). %U http://dblp.uni-trier.de/db/conf/iscas/iscas2010.html#SadhuH10 %@ 978-1-4244-5309-2

@inproceedings{conf/iscas/SadhuH10, added-at = {2011-04-14T00:00:00.000+0200}, author = {Sadhu, Bodhisatwa and Harjani, Ramesh}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/28f1a3c2b1bd3d6aaa62659ecb462e764/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2010}, ee = {http://dx.doi.org/10.1109/ISCAS.2010.5537040}, interhash = {3fc63d6de508d4606c2baa6a7b6cad85}, intrahash = {8f1a3c2b1bd3d6aaa62659ecb462e764}, isbn = {978-1-4244-5309-2}, keywords = {dblp}, pages = {1975-1978}, publisher = {IEEE}, timestamp = {2016-05-21T09:43:17.000+0200}, title = {Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%).}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2010.html#SadhuH10}, year = 2010 }