%0 Journal Article %1 journals/jssc/HuYFWC14 %A Hu, Weiwu %A Yang, Liang %A Fan, Bao-Xia %A Wang, Huandong %A Chen, Yunji %D 2014 %J J. Solid-State Circuits %K dblp %N 1 %P 41-49 %T An 8-Core MIPS-Compatible Processor in 32/28 nm Bulk CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc49.html#HuYFWC14 %V 49

@article{journals/jssc/HuYFWC14, added-at = {2014-02-14T00:00:00.000+0100}, author = {Hu, Weiwu and Yang, Liang and Fan, Bao-Xia and Wang, Huandong and Chen, Yunji}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/29a08e99d45d9ef8ef63148e56caaecf7/dblp}, ee = {http://dx.doi.org/10.1109/JSSC.2013.2284649}, interhash = {3a557a1e98ad7769ba4e7434c44a5d30}, intrahash = {9a08e99d45d9ef8ef63148e56caaecf7}, journal = {J. Solid-State Circuits}, keywords = {dblp}, number = 1, pages = {41-49}, timestamp = {2016-02-02T09:37:10.000+0100}, title = {An 8-Core MIPS-Compatible Processor in 32/28 nm Bulk CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc49.html#HuYFWC14}, volume = 49, year = 2014 }