%0 Conference Paper %1 conf/ipps/HagerZW08 %A Hager, Georg %A Zeiser, Thomas %A Wellein, Gerhard %B IPDPS %D 2008 %I IEEE %K dblp %P 1-7 %T Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers. %U http://dblp.uni-trier.de/db/conf/ipps/ipdps2008.html#HagerZW08

@inproceedings{conf/ipps/HagerZW08, added-at = {2014-08-03T00:00:00.000+0200}, author = {Hager, Georg and Zeiser, Thomas and Wellein, Gerhard}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2fd1154039222057bb3cbd540252fcc66/dblp}, booktitle = {IPDPS}, crossref = {conf/ipps/2008}, ee = {http://doi.ieeecomputersociety.org/10.1109/IPDPS.2008.4536341}, interhash = {37776ec8b5ce387964f0cee74a47df4a}, intrahash = {fd1154039222057bb3cbd540252fcc66}, keywords = {dblp}, pages = {1-7}, publisher = {IEEE}, timestamp = {2016-02-02T16:38:36.000+0100}, title = {Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers.}, url = {http://dblp.uni-trier.de/db/conf/ipps/ipdps2008.html#HagerZW08}, year = 2008 }