%0 Conference Paper %1 conf/vlsid/BesteKT14 %A Beste, Matthias %A Kiamehr, Saman %A Tahoori, Mehdi Baradaran %B VLSI Design %D 2014 %I IEEE Computer Society %K dblp %P 393-398 %T Layout-Aware Delay Variation Optimization for CNTFET-Based Circuits. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2014.html#BesteKT14 %@ 978-1-4799-2513-1

@inproceedings{conf/vlsid/BesteKT14, added-at = {2015-04-20T00:00:00.000+0200}, author = {Beste, Matthias and Kiamehr, Saman and Tahoori, Mehdi Baradaran}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/23aa5d827206d3f060322f84a0a2759b0/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2014}, ee = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2014.74}, interhash = {36d03abe35f15a9cc7591ecd2d3d91f8}, intrahash = {3aa5d827206d3f060322f84a0a2759b0}, isbn = {978-1-4799-2513-1}, keywords = {dblp}, pages = {393-398}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T11:08:46.000+0100}, title = {Layout-Aware Delay Variation Optimization for CNTFET-Based Circuits.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2014.html#BesteKT14}, year = 2014 }