%0 Journal Article %1 journals/mam/HuZGJ08 %A Hu, Wei %A Zhu, Yongxin %A Gu, Zonghua %A Jiang, Lei %D 2008 %J Microprocessors and Microsystems - Embedded Hardware Design %K dblp %N 4 %P 234-242 %T Pre-synthesis resource generation and estimation for transport-triggered architecture (TTA)-like architecture. %U http://dblp.uni-trier.de/db/journals/mam/mam32.html#HuZGJ08 %V 32

@article{journals/mam/HuZGJ08, added-at = {2009-01-30T00:00:00.000+0100}, author = {Hu, Wei and Zhu, Yongxin and Gu, Zonghua and Jiang, Lei}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/265276e7b0440608d90850107c276cc0c/dblp}, ee = {http://dx.doi.org/10.1016/j.micpro.2008.02.001}, interhash = {3338f3df245dba785c5a4fad49820a2c}, intrahash = {65276e7b0440608d90850107c276cc0c}, journal = {Microprocessors and Microsystems - Embedded Hardware Design}, keywords = {dblp}, number = 4, pages = {234-242}, timestamp = {2016-02-02T09:48:33.000+0100}, title = {Pre-synthesis resource generation and estimation for transport-triggered architecture (TTA)-like architecture.}, url = {http://dblp.uni-trier.de/db/journals/mam/mam32.html#HuZGJ08}, volume = 32, year = 2008 }