%0 Conference Paper %1 conf/vlsid/VallerioJ03 %A Vallerio, Keith S. %A Jha, Niraj K. %B VLSI Design %D 2003 %I IEEE Computer Society %K dblp %P 480- %T Task Graph Extraction for Embedded System Synthesis. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#VallerioJ03 %@ 0-7695-1868-0

@inproceedings{conf/vlsid/VallerioJ03, added-at = {2015-04-20T00:00:00.000+0200}, author = {Vallerio, Keith S. and Jha, Niraj K.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2f213a93a587a466c0eaf549ecfe3f404/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2003}, ee = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183180}, interhash = {31d6a611239d0690311f17b49cbacdac}, intrahash = {f213a93a587a466c0eaf549ecfe3f404}, isbn = {0-7695-1868-0}, keywords = {dblp}, pages = {480-}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T11:08:29.000+0100}, title = {Task Graph Extraction for Embedded System Synthesis.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#VallerioJ03}, year = 2003 }