%0 Conference Paper %1 conf/date/MusollC96 %A Musoll, Enric %A Cortadella, Jordi %B ED&TC %D 1996 %I IEEE Computer Society %K dblp %P 219-223 %T Optimizing CMOS Circuits for Low Power Using Transistor Reordering. %U http://dblp.uni-trier.de/db/conf/date/edtc1996.html#MusollC96 %@ 0-8186-7423-7

@inproceedings{conf/date/MusollC96, added-at = {2015-11-11T00:00:00.000+0100}, author = {Musoll, Enric and Cortadella, Jordi}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/21286f1b098ce6bd2a5d9349dfbe92ea0/dblp}, booktitle = {ED&TC}, crossref = {conf/date/1996}, ee = {http://doi.ieeecomputersociety.org/10.1109/EDTC.1996.494152}, interhash = {31726cf3b4a9da31c6bfcc04bf934fbc}, intrahash = {1286f1b098ce6bd2a5d9349dfbe92ea0}, isbn = {0-8186-7423-7}, keywords = {dblp}, pages = {219-223}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T13:24:30.000+0100}, title = {Optimizing CMOS Circuits for Low Power Using Transistor Reordering.}, url = {http://dblp.uni-trier.de/db/conf/date/edtc1996.html#MusollC96}, year = 1996 }