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%0 Conference Paper
%1 conf/fpl/TavaresBMS04
%A Tavares, C. J.
%A Bungardean, C.
%A Matos, G. M.
%A de Sousa, José T.
%B FPL
%D 2004
%E Becker, Jürgen
%E Platzner, Marco
%E Vernalde, Serge
%I Springer
%K dblp
%P 344-353
%T Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor.
%U http://dblp.uni-trier.de/db/conf/fpl/fpl2004.html#TavaresBMS04
%V 3203
%@ 3-540-22989-2
@inproceedings{conf/fpl/TavaresBMS04,
added-at = {2017-05-21T00:00:00.000+0200},
author = {Tavares, C. J. and Bungardean, C. and Matos, G. M. and de Sousa, José T.},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2c04c3856faa98ec3c27a108ef1c1e562/dblp},
booktitle = {FPL},
crossref = {conf/fpl/2004},
editor = {Becker, Jürgen and Platzner, Marco and Vernalde, Serge},
ee = {https://doi.org/10.1007/978-3-540-30117-2_36},
interhash = {2b956f026c0299902aaaf2ff54fa344f},
intrahash = {c04c3856faa98ec3c27a108ef1c1e562},
isbn = {3-540-22989-2},
keywords = {dblp},
pages = {344-353},
publisher = {Springer},
series = {Lecture Notes in Computer Science},
timestamp = {2019-09-27T14:36:20.000+0200},
title = {Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor.},
url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2004.html#TavaresBMS04},
volume = 3203,
year = 2004
}
