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%0 Conference Paper
%1 conf/mtdt/DevoivreLJCFTVGBHVTRGPTGRBPNPDLHH02
%A Devoivre, Thierry
%A Lunenborg, M.
%A Julien, C.
%A Carrere, J.-P.
%A Ferreira, P.
%A Toren, W. J.
%A VandeGoor, A.
%A Gayet, P.
%A Berger, T.
%A Hinsinger, O.
%A Vannier, P.
%A Trouiller, Y.
%A Rody, Y.
%A Goirand, P.-J.
%A Palla, R.
%A Thomas, I.
%A Guyader, F.
%A Roy, David
%A Borot, B.
%A Planes, Nicolas
%A Naudet, Sylvie
%A Pico, F.
%A Duca, D.
%A Lalanne, F.
%A Heslinga, D.
%A Haond, M.
%B MTDT
%D 2002
%I IEEE Computer Society
%K dblp
%P 157-162
%T Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC).
%U http://dblp.uni-trier.de/db/conf/mtdt/mtdt2002.html#DevoivreLJCFTVGBHVTRGPTGRBPNPDLHH02
%@ 0-7695-1617-3
@inproceedings{conf/mtdt/DevoivreLJCFTVGBHVTRGPTGRBPNPDLHH02,
added-at = {2022-01-20T00:00:00.000+0100},
author = {Devoivre, Thierry and Lunenborg, M. and Julien, C. and Carrere, J.-P. and Ferreira, P. and Toren, W. J. and VandeGoor, A. and Gayet, P. and Berger, T. and Hinsinger, O. and Vannier, P. and Trouiller, Y. and Rody, Y. and Goirand, P.-J. and Palla, R. and Thomas, I. and Guyader, F. and Roy, David and Borot, B. and Planes, Nicolas and Naudet, Sylvie and Pico, F. and Duca, D. and Lalanne, F. and Heslinga, D. and Haond, M.},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/27ae36b0873651fd26f0d20680c1664a4/dblp},
booktitle = {MTDT},
crossref = {conf/mtdt/2002},
ee = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2002.1029778},
interhash = {1add097390b8627fbeb101337b63ecfb},
intrahash = {7ae36b0873651fd26f0d20680c1664a4},
isbn = {0-7695-1617-3},
keywords = {dblp},
pages = {157-162},
publisher = {IEEE Computer Society},
timestamp = {2022-03-01T07:25:49.000+0100},
title = {Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC).},
url = {http://dblp.uni-trier.de/db/conf/mtdt/mtdt2002.html#DevoivreLJCFTVGBHVTRGPTGRBPNPDLHH02},
year = 2002
}