%0 Conference Paper %1 conf/dac/FanJGCJ18 %A Fan, Yuanbo %A Jia, Tianyu %A Gu, Jie %A Campanoni, Simone %A Joseph, Russ %B DAC %D 2018 %I ACM %K dblp %P 40:1-40:6 %T Compiler-guided instruction-level clock scheduling for timing speculative processors. %U http://dblp.uni-trier.de/db/conf/dac/dac2018.html#FanJGCJ18 %@ 978-1-5386-4114-9

@inproceedings{conf/dac/FanJGCJ18, added-at = {2018-11-21T00:00:00.000+0100}, author = {Fan, Yuanbo and Jia, Tianyu and Gu, Jie and Campanoni, Simone and Joseph, Russ}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/24255f210fe7430fa5e84df5f5ce45fce/dblp}, booktitle = {DAC}, crossref = {conf/dac/2018}, ee = {https://doi.org/10.1109/DAC.2018.8465795}, interhash = {12a6e3f45655331c38af757a40cb2674}, intrahash = {4255f210fe7430fa5e84df5f5ce45fce}, isbn = {978-1-5386-4114-9}, keywords = {dblp}, pages = {40:1-40:6}, publisher = {ACM}, timestamp = {2019-09-27T18:39:24.000+0200}, title = {Compiler-guided instruction-level clock scheduling for timing speculative processors.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2018.html#FanJGCJ18}, year = 2018 }