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%0 Conference Paper
%1 conf/aspdac/WalterLSMY07
%A Walter, David
%A Little, Scott
%A Seegmiller, Nicholas
%A Myers, Chris J.
%A Yoneda, Tomohiro
%B ASP-DAC
%D 2007
%I IEEE Computer Society
%K dblp
%P 316-323
%T Symbolic Model Checking of Analog/Mixed-Signal Circuits.
%U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2007.html#WalterLSMY07
%@ 1-4244-0629-3
@inproceedings{conf/aspdac/WalterLSMY07,
added-at = {2019-06-02T00:00:00.000+0200},
author = {Walter, David and Little, Scott and Seegmiller, Nicholas and Myers, Chris J. and Yoneda, Tomohiro},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/21d7395a0b00b487998550115faef4806/dblp},
booktitle = {ASP-DAC},
crossref = {conf/aspdac/2007},
ee = {https://www.wikidata.org/entity/Q59859569},
interhash = {1224c46f4d384cbfcb5c49f2e227b373},
intrahash = {1d7395a0b00b487998550115faef4806},
isbn = {1-4244-0629-3},
keywords = {dblp},
pages = {316-323},
publisher = {IEEE Computer Society},
timestamp = {2019-09-27T19:23:07.000+0200},
title = {Symbolic Model Checking of Analog/Mixed-Signal Circuits.},
url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2007.html#WalterLSMY07},
year = 2007
}