Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Conference Paper
%1 conf/vlsi/ProtzeKEH0HSEM19
%A Protze, Florian
%A Kreißig, Martin
%A Ellinger, Frank
%A Höppner, Sebastian
%A Hartmann, Stephan
%A Hänzsche, Stefan
%A Scholze, Stefan
%A Ellguth, Georg
%A Mayr, Christian
%B VLSI-SoC
%D 2019
%I IEEE
%K dblp
%P 155-158
%T Performance Analysis of a Comparator Based Mixed-Signal Control Loop in 28 nm CMOS.
%U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2019.html#ProtzeKEH0HSEM19
%@ 978-1-7281-3915-9
@inproceedings{conf/vlsi/ProtzeKEH0HSEM19,
added-at = {2022-01-06T00:00:00.000+0100},
author = {Protze, Florian and Kreißig, Martin and Ellinger, Frank and Höppner, Sebastian and Hartmann, Stephan and Hänzsche, Stefan and Scholze, Stefan and Ellguth, Georg and Mayr, Christian},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2054ab9e26ec21f715745d84c0d250dc6/dblp},
booktitle = {VLSI-SoC},
crossref = {conf/vlsi/2019},
ee = {https://doi.org/10.1109/VLSI-SoC.2019.8920295},
interhash = {0d4f51b62251b3aab2584be3f0ab5b84},
intrahash = {054ab9e26ec21f715745d84c0d250dc6},
isbn = {978-1-7281-3915-9},
keywords = {dblp},
pages = {155-158},
publisher = {IEEE},
timestamp = {2022-03-01T07:20:17.000+0100},
title = {Performance Analysis of a Comparator Based Mixed-Signal Control Loop in 28 nm CMOS.},
url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2019.html#ProtzeKEH0HSEM19},
year = 2019
}