%0 Journal Article %1 journals/fmsd/TaharK98 %A Tahar, Sofiène %A Kumar, Ramayya %D 1998 %J Formal Methods in System Design %K dblp %N 2 %P 159-225 %T A Practical Methodology for the Formal Verification of RISC Processors. %U http://dblp.uni-trier.de/db/journals/fmsd/fmsd13.html#TaharK98 %V 13

@article{journals/fmsd/TaharK98, added-at = {2011-05-25T00:00:00.000+0200}, author = {Tahar, Sofiène and Kumar, Ramayya}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/289fe68e8ba3aa20d59a876673377e443/dblp}, ee = {http://dx.doi.org/10.1023/A:1008622002590}, interhash = {0941af0bbb119ac74e1135782fb9be42}, intrahash = {89fe68e8ba3aa20d59a876673377e443}, journal = {Formal Methods in System Design}, keywords = {dblp}, number = 2, pages = {159-225}, timestamp = {2016-02-02T01:14:24.000+0100}, title = {A Practical Methodology for the Formal Verification of RISC Processors.}, url = {http://dblp.uni-trier.de/db/journals/fmsd/fmsd13.html#TaharK98}, volume = 13, year = 1998 }