%0 Conference Paper %1 conf/glvlsi/KapoorN94 %A Kapoor, Bhanu %A Nair, V. S. S. %B Great Lakes Symposium on VLSI %D 1994 %I IEEE %K dblp %P 222-227 %T Area, performance, and sensitizable paths [logic design]. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi1994.html#KapoorN94 %@ 0-8186-5610-7

@inproceedings{conf/glvlsi/KapoorN94, added-at = {2014-09-29T00:00:00.000+0200}, author = {Kapoor, Bhanu and Nair, V. S. S.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2b3a4c27c7293341af7c36e790692973b/dblp}, booktitle = {Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/1994}, ee = {http://dx.doi.org/10.1109/GLSV.1994.289965}, interhash = {01bee9c9c9e6382092e2663f82b5651e}, intrahash = {b3a4c27c7293341af7c36e790692973b}, isbn = {0-8186-5610-7}, keywords = {dblp}, pages = {222-227}, publisher = {IEEE}, timestamp = {2016-02-02T12:49:58.000+0100}, title = {Area, performance, and sensitizable paths [logic design].}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi1994.html#KapoorN94}, year = 1994 }