%0 Journal Article %1 journals/mam/ZhangNA07 %A Zhang, Ming Z. %A Ngo, Hau T. %A Asari, Vijayan K. %D 2007 %J Microprocessors and Microsystems %K dblp %N 1 %P 25-37 %T Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution. %U http://dblp.uni-trier.de/db/journals/mam/mam31.html#ZhangNA07 %V 31

@article{journals/mam/ZhangNA07, added-at = {2007-04-30T00:00:00.000+0200}, author = {Zhang, Ming Z. and Ngo, Hau T. and Asari, Vijayan K.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2ece45860657d4ab1bbdaaa6a9660d29e/dblp}, ee = {http://dx.doi.org/10.1016/j.micpro.2006.07.004}, interhash = {016270074cde05e954ec43678162da4b}, intrahash = {ece45860657d4ab1bbdaaa6a9660d29e}, journal = {Microprocessors and Microsystems}, keywords = {dblp}, number = 1, pages = {25-37}, timestamp = {2016-02-02T09:48:40.000+0100}, title = {Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution.}, url = {http://dblp.uni-trier.de/db/journals/mam/mam31.html#ZhangNA07}, volume = 31, year = 2007 }