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<rdf:RDF xmlns:community="http://www.bibsonomy.org/ontologies/2008/05/community#" xmlns:foaf="http://xmlns.com/foaf/0.1/" xmlns:owl="http://www.w3.org/2002/07/owl#" xmlns:admin="http://webns.net/mvcb/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:syn="http://purl.org/rss/1.0/modules/syndication/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" xmlns:cc="http://web.resource.org/cc/" xmlns:xsd="http://www.w3.org/2001/XMLSchema#" xmlns:swrc="http://swrc.ontoware.org/ontology#" xmlns:rdfs="http://www.w3.org/2000/01/rdf-schema#" xmlns="http://purl.org/rss/1.0/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xml:base="https://puma.ub.uni-stuttgart.de/tag/Parallelization"><owl:Ontology rdf:about=""><rdfs:comment>PUMA publications for /tag/Parallelization</rdfs:comment><owl:imports rdf:resource="http://swrc.ontoware.org/ontology/portal"/></owl:Ontology><rdf:Description rdf:about="https://puma.ub.uni-stuttgart.de/bibtex/27a2df7ee14b092a6580c0c50c1d034e7/isw-bibliothek"><owl:sameAs rdf:resource="/uri/bibtex/27a2df7ee14b092a6580c0c50c1d034e7/isw-bibliothek"/><rdf:type rdf:resource="http://swrc.ontoware.org/ontology#Article"/><owl:sameAs rdf:resource="http://www.sciencedirect.com/science/article/pii/S2212827115011002"/><swrc:date>Sun Mar 13 16:06:36 CET 2016</swrc:date><swrc:journal>Procedia \{CIRP\} </swrc:journal><swrc:note>Research and Innovation in Manufacturing: Key Enabling Technologies for the Factories of the Future - Proceedings of the 48th \{CIRP\} Conference on Manufacturing Systems </swrc:note><swrc:pages>864 - 869</swrc:pages><swrc:title>Analysis and Design of Computerized Numerical Controls for Execution on Multi-core Systems </swrc:title><swrc:volume>41</swrc:volume><swrc:year>2016</swrc:year><swrc:keywords>CNC ISW Multi-core Parallelization Partitioning xkt </swrc:keywords><swrc:abstract>Abstract Multi-core processors offer a performance increment compared to single-core platforms. This leap in performance is desired to be ported to computerized numerical controls. However, in order to profit of the benefits multi-core processors can bring, the software has to be tailored to real parallel execution. In this paper a concept is proposed for partitioning numerical control software functions for being concurrently executed on multi-core systems. Specifically, the interpreter and the cutter radius compensation modules have been analyzed for devising a feasible parallel architecture. The parser algorithm has been implemented following the proposed scheme in a thread-based approach. Experiments were conducted under a real time Linux kernel extension utilizing the PREEMPT_RT patch. The results were compared against its serial version in terms of execution times to validate the concept. </swrc:abstract><swrc:hasExtraField><swrc:Field swrc:value="2212-8271" swrc:key="issn"/></swrc:hasExtraField><swrc:hasExtraField><swrc:Field swrc:value="http://dx.doi.org/10.1016/j.procir.2015.12.021" swrc:key="doi"/></swrc:hasExtraField><swrc:author><rdf:Seq><rdf:_1><swrc:Person swrc:name="José María Vivanco"/></rdf:_1><rdf:_2><swrc:Person swrc:name="Matthias Keinert"/></rdf:_2><rdf:_3><swrc:Person swrc:name="Armin Lechler"/></rdf:_3><rdf:_4><swrc:Person swrc:name="Alexander Verl"/></rdf:_4></rdf:Seq></swrc:author></rdf:Description><rdf:Description rdf:about="https://puma.ub.uni-stuttgart.de/bibtex/207908a9de6488c702fcde927f25b954e/isw-bibliothek"><owl:sameAs rdf:resource="/uri/bibtex/207908a9de6488c702fcde927f25b954e/isw-bibliothek"/><rdf:type rdf:resource="http://swrc.ontoware.org/ontology#InProceedings"/><swrc:date>Thu Mar 03 09:53:12 CET 2016</swrc:date><swrc:booktitle>Proceedings of the 24th International Conference on Flexible Automation &amp; Intelligent Manufacturing FAIM 2014</swrc:booktitle><swrc:pages>pp. 79-86</swrc:pages><swrc:title>Analysis of CNC Software Modules regarding Parallelization Capability</swrc:title><swrc:year>2014</swrc:year><swrc:keywords>CNC ISW Multicore Parallelization xkt </swrc:keywords><swrc:abstract>The software design of current CNC systems is of limited suitability for real parallel execution on multicore systems. Even though CNC systems are rudimentarily designed in a modular way, a good load balancing andtherefore an efficient use of multiple processor cores is not satisfactorily to be accomplished, as the modularization is not sophisticated enough. A parallelization of CNC functions and algorithms would remedy this deficit. Thispaper presents an analysis on which parts of a CNC system show the capability for parallelization. Furthermore an approach is presented on how the parallelization of a specific function, namely the look-ahead function, can be accomplished.</swrc:abstract><swrc:hasExtraField><swrc:Field swrc:value="[xtl:6]" swrc:key="__markedentry"/></swrc:hasExtraField><swrc:author><rdf:Seq><rdf:_1><swrc:Person swrc:name="Matthias Keinert"/></rdf:_1><rdf:_2><swrc:Person swrc:name="Benjamin Kaiser"/></rdf:_2><rdf:_3><swrc:Person swrc:name="Armin Lechler"/></rdf:_3><rdf:_4><swrc:Person swrc:name="Alexander Verl"/></rdf:_4></rdf:Seq></swrc:author></rdf:Description><rdf:Description rdf:about="https://puma.ub.uni-stuttgart.de/bibtex/2dccb0302d8b765b1450e86f4b2798951/amerwafai"><owl:sameAs rdf:resource="/uri/bibtex/2dccb0302d8b765b1450e86f4b2798951/amerwafai"/><rdf:type rdf:resource="http://swrc.ontoware.org/ontology#Misc"/><swrc:date>Fri Jan 29 09:34:55 CET 2016</swrc:date><swrc:address>Vienna, Austria</swrc:address><swrc:booktitle>Euro-Par 2015: Parallel Processing</swrc:booktitle><swrc:month>August</swrc:month><swrc:series>LNCS</swrc:series><swrc:title>Optimized Force Calculation of Molecular Dynamics Simulations for the Intel Xeon Phi</swrc:title><swrc:volume>9233</swrc:volume><swrc:year>2015</swrc:year><swrc:keywords>HLRS SCOPE absolute and calculation cell colored core distributed dynamic force gather intel interaction law linked memory molecular myown newton operation optimization parallel parallelization performance phi processing range scatter shared short site third xeon yellow </swrc:keywords><swrc:abstract>We provide details on the shared-memory parallelization for manycore architectures of the molecular dynamics framework ls1-mardyn, including an optimization of the SIMD vectorization for multi-centered molecules. The novel shared-memory parallelization scheme allows to re- tain Newton&#039;s third law optimization and exhibits very good scaling on many-core devices such as a full Xeon Phi card running 240 threads. The Xeon Phi can thus be exploited and delivers comparable performance as IvyBridge nodes in our experiments.</swrc:abstract><swrc:hasExtraField><swrc:Field swrc:value="2015-08-19 09:05:42 +0000" swrc:key="date-added"/></swrc:hasExtraField><swrc:hasExtraField><swrc:Field swrc:value="2015-08-19 09:10:27 +0000" swrc:key="date-modified"/></swrc:hasExtraField><swrc:author><rdf:Seq><rdf:_1><swrc:Person swrc:name="Nikola Tchipev"/></rdf:_1><rdf:_2><swrc:Person swrc:name="Amer Wafai"/></rdf:_2><rdf:_3><swrc:Person swrc:name="Colin W. Glass"/></rdf:_3><rdf:_4><swrc:Person swrc:name="Wolfgang Eckhardt"/></rdf:_4><rdf:_5><swrc:Person swrc:name="Alexander Heinecke"/></rdf:_5><rdf:_6><swrc:Person swrc:name="Hans-Joachim Bungartz"/></rdf:_6><rdf:_7><swrc:Person swrc:name="Philipp Neumann"/></rdf:_7></rdf:Seq></swrc:author><swrc:editor><rdf:Seq><rdf:_1><swrc:Person swrc:name="Jesper Larsson Tr{\&#034;a}ff"/></rdf:_1><rdf:_2><swrc:Person swrc:name="Sascha Hunold"/></rdf:_2><rdf:_3><swrc:Person swrc:name="Francesco Versaci"/></rdf:_3></rdf:Seq></swrc:editor></rdf:Description><foaf:Group rdf:about="https://puma.ub.uni-stuttgart.de/tag/Parallelization"><foaf:name>Parallelization</foaf:name><description>Community for tag(s) Parallelization</description></foaf:Group></rdf:RDF>