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Security Closure of Physical Layouts ICCAD Special Session Paper

, , , , , , , , and . 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), Piscataway, IEEE, (2021)
DOI: 10.1109/ICCAD51958.2021.9643543

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Automatic Synthesis of Self-Recovering VLSI Systems., and . IEEE Trans. Computers, 45 (2): 131-142 (1996)A Primer on Hardware Security: Models, Methods, and Metrics., , and . Proceedings of the IEEE, 102 (8): 1283-1295 (2014)Regaining Trust in VLSI Design: Design-for-Trust Techniques., , and . Proceedings of the IEEE, 102 (8): 1266-1282 (2014)Novel Test-Mode-Only Scan Attack and Countermeasure for Compression-Based Scan Architectures., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (5): 808-821 (2015)Guest Editorial Special Section on Hardware Security and Trust., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (6): 873-874 (2015)Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (1): 2-15 (2015)Power Optimization for Universal Hash Function Data Path Using Divide-and-Concatenate Technique., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (10): 1763-1769 (2007)Guest Editors' Introduction: Online VLSI Testing., and . IEEE Design & Test of Computers, 15 (4): 12-16 (1998)Towards Secure Analog Designs: A Secure Sense Amplifier Using Memristors., , and . ISVLSI, page 516-521. IEEE Computer Society, (2014)Simulated annealing based yield enhancement of layouts., and . Great Lakes Symposium on VLSI, page 166-169. IEEE, (1994)