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Disambiguation of "Tan, Sheldon X.-D."

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Special Session : Machine Learning for Semiconductor Test and Reliability

, , , , , , , , , and . 2021 IEEE 39th VLSI Test Symposium (VTS), Piscataway, IEEE, (2021)
DOI: 10.1109/VTS50974.2021.9441052

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Xiangyin Tan University of Stuttgart

D. Marino

Chensheng Xu University of Stuttgart

Yifan Xie University of Stuttgart

Boyu Xian University of Stuttgart

 

Other publications of authors with the same name

A general hierarchical circuit modeling and simulation algorithm.. IEEE Trans. on CAD of Integrated Circuits and Systems, 24 (3): 418-434 (2005)Parallel GMRES solver for fast analysis of large linear dynamic systems on GPU platforms., , , , , and . Integration, (2016)Fast timing analysis of clock networks considering environmental uncertainty., , and . Integration, 45 (4): 376-387 (2012)A GPU-accelerated envelope-following method for switching power converter simulation., , , and . DATE, page 1349-1354. IEEE, (2012)Full-chip thermal analysis of 3D ICs with liquid cooling by GPU-accelerated GMRES method., , , and . ISQED, page 123-128. IEEE, (2012)Fast Decap Allocation Algorithm For Robust On-Chip Power Delivery., , , , , and . ISQED, page 542-547. IEEE Computer Society, (2005)General Block Structure-Preserving Reduced Order Modeling of Linear Dynamic Circuits., , , , and . ISQED, page 633-638. IEEE Computer Society, (2007)Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (11): 2402-2412 (2006)Efficient very large scale integration power/ground network sizing based on equivalent circuit modeling., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 22 (3): 277-284 (2003)Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 22 (12): 1678-1684 (2003)