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Digital pulse-width pulse-position modulator in 28 nm CMOS for carrier frequencies up to 1 GHz

, , , , and . IEEE Radio Frequency Integrated Circuits Symposium (RFIC), page 99--102. Phoenix, AZ, USA, (2015)
DOI: 10.1109/RFIC.2015.7337714

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Digital pulse-width pulse-position modulator in 28 nm CMOS for carrier frequencies up to 1 GHz, , , , and . IEEE Radio Frequency Integrated Circuits Symposium (RFIC), page 99--102. Phoenix, AZ, USA, (2015)Coding efficiency of RF pulse-width-modulation for mobile communications., , , and . ISSSE, page 1-5. IEEE, (2012)A decoding algorithm with restrictions for array codes., and . IEEE Trans. Information Theory, 45 (7): 2339-2344 (1999)A RF Pulse-Width and Pulse-Position Modulator IC in 28 nm FDSOI CMOS., , , , , , , , , and . NORCAS, page 1-4. IEEE, (2018)Digital pulse-width pulse-position modulator in 28 nm CMOS for carrier frequencies up to 1 GHz, , , , and . RFIC 2015 : proceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, page 99-102. Piscataway, NJ, IEEE, (2015)Array-Codes auf der Basis interleavter Blockcodes.. University of Duisburg-Essen, Germany, (2000)Correction to Ä decoding algorithm with restrictions for array codes"., and . IEEE Trans. Information Theory, 47 (1): 479 (2001)A RF Pulse-Width and Pulse-Position Modulator IC in 28 nm FDSOI CMOS, , , , , , , , , and . 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), Piscataway, NJ, IEEE, (2018)