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Energy efficiency vs. performance of the numerical solution of PDEs: an application study on a low-power ARM-based cluster

, , , , , , and . Journal of Computational Physics, (March 2013)
DOI: 10.1016/j.jcp.2012.11.031

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ArchExplorer for Automatic Design Space Exploration., , , , and . IEEE Micro, 30 (5): 5-15 (2010)Experiences with mobile processors for energy efficient HPC., , , , , and . DATE, page 464-468. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A latency-conscious SMT branch prediction architecture., , , and . IJHPCN, 2 (1): 11-21 (2004)Parallelizing general histogram application for CUDA architectures., , , , and . ICSAMOS, page 11-18. IEEE, (2013)Analysis of video filtering on the cell processor., , , , and . ISCAS, page 488-491. IEEE, (2008)Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications., , , , and . SAMOS, volume 5114 of Lecture Notes in Computer Science, page 53-64. Springer, (2008)Scaling HMMER Performance on Multicore Architectures., , , , and . CISIS, page 618-623. IEEE Computer Society, (2011)The SARC Architecture., , , , , , , , , and . IEEE Micro, 30 (5): 16-29 (2010)A Streaming Machine Description and Programming Model., , , , and . SAMOS, volume 4599 of Lecture Notes in Computer Science, page 107-116. Springer, (2007)Dynamic Cache Partitioning Based on the MLP of Cache Misses., , , and . Trans. HiPEAC, (2011)