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Disambiguation of "Boland, David"

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Dynamic bitwidth assignment for efficient dot products.

, and . FPL, page 1-8. IEEE, (2017)

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Dr. Marie Davidova University of Stuttgart

David Pfleger University of Stuttgart

Elektrifizierung des Stückgutverkehrs – Vorgehensweise zur virtuellen Elektrifizierung in einer Großstadt., , , and . Tagungsband, Springer Fachmedien Wiesbaden, (May 2023)
Elektrifizierung des Stückgutverkehrs – Vorgehensweise zur virtuellen Elektrifizierung in einer Großstadt., , , and . Tagungsband, Springer Fachmedien Wiesbaden, (May 2023)Simulationsgestützte Planung, , , and . Technisches Handbuch Logistik 2: Fördertechnik, Materialfluss, Intralogistik, Springer Berlin Heidelberg, Berlin, Heidelberg, (2020)Ermittlung des logistischen und energetischen Flexibilitätspotentials eines Logistikzentrums unter Berücksichtigung von Elektromobilität, , , , , and . Wissenschaftliche Gesellschaft für Technische Logistik e. V. (WGTL), (2020)

David Inkermann

David Briesenick University of Stuttgart

David Gudnason University of Stuttgart

 

Other publications of authors with the same name

An FPGA-based implementation of the MINRES algorithm., and . FPL, page 379-384. IEEE, (2008)Optimizing memory bandwidth use and performance for matrix-vector multiplication in iterative methods., and . TRETS, 4 (3): 22:1-22:14 (2011)FPGA Fastfood - A High Speed Systolic Implementation of a Large Scale Online Kernel Method., , and . FPGA, page 279-284. ACM, (2018)Simultaneous Inference and Training Using On-FPGA Weight Perturbation Techniques., , , , , and . FPT, page 306-309. IEEE, (2018)Real-time FPGA-based Anomaly Detection for Radio Frequency Signals., , , and . ISCAS, page 1-5. IEEE, (2018)Long Short-Term Memory for Radio Frequency Spectral Prediction and its Real-Time FPGA Implementation., , , , , , , and . MILCOM, page 1-9. IEEE, (2018)Optimising Memory Bandwidth Use for Matrix-Vector Multiplication in Iterative Methods., and . ARC, volume 5992 of Lecture Notes in Computer Science, page 169-181. Springer, (2010)Dynamic bitwidth assignment for efficient dot products., and . FPL, page 1-8. IEEE, (2017)Unrolling Ternary Neural Networks., , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 12 (4): 22:1-22:23 (2019)AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers., , , , , , and . CoRR, (2019)