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Disambiguation of "Gerfers, Friedel"

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Behavioral Model for a High-Speed 2:1 Analog Multiplexer

, , , , , , , and . 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), page 1-4. Piscataway, NJ, IEEE, (2018)
DOI: 10.1109/MWSCAS.2018.8623931

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Other publications of authors with the same name

Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators., , and . IEEE Trans. on Circuits and Systems, 51-I (6): 1088-1099 (2004)A cascaded continuous-time Sigma Delta modulator with 80 dB dynamic range., , , and . ISCAS (1), page 405-408. IEEE, (2004)AMDAC Common-Mode Shifting Technique enabling Power Consumption Reduction in Pipeline ADCs., , and . MWSCAS, page 400-403. IEEE, (2018)An infinite-skew tolerant delay locked loop., , and . ISCAS, IEEE, (2006)A 48-Port FCC-Compliant 10GBASE-T Transmitter With Mixed-Mode Adaptive Echo Canceller., , , , , , , and . J. Solid-State Circuits, 47 (12): 3261-3272 (2012)A 16-port FCC-compliant 10GBase-T transmitter and hybrid with 76dBc SFDR up to 400MHz scalable to 48 ports., , , , , , and . ISSCC, page 412-413. IEEE, (2012)Increased jitter sensitivity in continuous- and discrete-time Sigma-Delta modulators due to finite opamp settling speed., , and . ISCAS (3), page 2543-2546. IEEE, (2005)Figure of merit based design strategy for low-power continuous-time Sigma-Delta modulators., , , and . ISCAS (4), page 233-236. IEEE, (2002)Digital-to-Analog Converters Using Frequency Interleaving: Mathematical Framework and Experimental Verification., , , , , and . CSSP, 37 (11): 4929-4954 (2018)Behavioral Model for a High-Speed 2:1 Analog Multiplexer, , , , , , , and . IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), page 1--4. Windsor, ON, Canada, (2018)