Author of the publication

Analyzing the trade-off between power consumption and beamforming algorithm performance using a hearing aid ASIP

, , , , , , and . 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), page 88-96. IEEE, (July 2017)
DOI: 10.1109/SAMOS.2017.8344615

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

FLINT+: A runtime-configurable emulation-based stochastic timing analysis framework., , , , , and . Integration, (2019)FLINT+: A runtime-configurable emulation-based stochastic timing analysis framework., , , , , and . PATMOS, page 1-8. IEEE, (2017)Coherent Design of Hybrid Approximate Adders: Unified Design Framework and Metrics., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (4): 736-745 (2018)Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh Environments., , , , , , and . SAMOS, volume 11733 of Lecture Notes in Computer Science, page 3-17. Springer, (2019)Analyzing the trade-off between power consumption and beamforming algorithm performance using a hearing aid ASIP, , , , , , and . 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), page 88-96. IEEE, (July 2017)A fair comparison of adders in stochastic regime., , , and . PATMOS, page 1-6. IEEE, (2017)Analyzing the trade-off between power consumption and beamforming algorithm performance using a hearing aid ASIP., , , , , , and . SAMOS, page 88-96. IEEE, (2017)Comparing vertical and horizontal SIMD vector processor architectures for accelerated image feature extraction., , and . Journal of Systems Architecture - Embedded Systems Design, (2019)