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An autonomic-computing approach on mapping threads to multi-cores for software transactional memory

, , , , and . Concurrency and Computation: Practice and Experience, (2018)
DOI: 10.1002/cpe.4506

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Autonomic Parallelism and Thread Mapping Control on Software Transactional Memory., , , , and . ICAC, page 189-198. IEEE, (2016)Control of Autonomic Parallelism Adaptation on Software Transactional Memory, , , , and . International Conference on High Performance Computing & Simulation (HPCS 2016), page 180-187. Innsbruck, Austria, (July 2016)Autonomic Parallelism and Thread Mapping Control on Software Transactional Memory., , , , and . ICAC, page 189-198. IEEE, (2016)Control of autonomic parallelism adaptation on software transactional memory., , , , and . HPCS, page 180-187. IEEE, (2016)Autonomic Thread Parallelism and Mapping Control for Software Transactional Memory. (Contrôle Autonomique du Parallélisme et du Placement de Threads pour les Mémoires Transactionnelles Logicielles).. INRIA, France, (2016)An autonomic-computing approach on mapping threads to multi-cores for software transactional memory, , , , and . Concurrency and Computation: Practice and Experience, (2018)Autonomic Parallelism Adaptation for Software Transactional Memory, , , , and . Conférence d'informatique en Parallélisme, Architecture et Système (COMPAS), Lorient, France, (July 2016)An autonomic-computing approach on mapping threads to multi-cores for software transactional memory., , , , and . Concurrency and Computation: Practice and Experience, (2018)Collectives in hybrid MPI+MPI code : Design, practice and performance, , , and . Parallel computing, 99 (November): 102669 (2020)Containerization for High Performance Computing Systems: Survey and Prospects, , and . IEEE transactions on software engineering, 49 (4): 2722-2740 (2023)