{"0705ddefdd4f509817b62b1b6e006879drb":{"DOI":"","ISBN":"","ISSN":"","URL":"","abstract":"","annote":"","author":[{"family":"Rubio Bonilla","given":"Daniel"},{"family":"Schubert","given":"Lutz"}],"citation-label":"rubiobonilla2012memoryregion","collection-editor":[{"family":"on Computational Structures Technology","given":"Eleventh International Conference"}],"collection-title":"","container-author":[{"family":"on Computational Structures Technology","given":"Eleventh International Conference"}],"container-title":"","documents":[],"edition":"","editor":[{"family":"on Computational Structures Technology","given":"Eleventh International Conference"}],"event-date":{"date-parts":[["2012"]],"literal":"2012"},"event-place":"","id":"0705ddefdd4f509817b62b1b6e006879drb","interhash":"11db3fea59ecf64e7db6a6e6cd3638f0","intrahash":"0705ddefdd4f509817b62b1b6e006879","issue":"","issued":{"date-parts":[["2012"]],"literal":"2012"},"keyword":"hlrs hpc myown performance programming speculation thread-level","note":"","number":"","page":"","page-first":"","publisher":"","publisher-place":"","status":"","title":"Memory-Region Thread Level Speculative Execution","type":"article-journal","username":"drb","version":"","volume":""}}