This paper shows a neural stimulator with 15V supply voltage combined with a neural low-noise amplifier (LNA) with a supply of ±1.65V around the common mode voltage (VCM) of 7.5V. In most implementations, the stimulator and recorder use the same supply domain, thus either leading to low voltage compliance (VC) for the stimulator or to high power consumption in the recorder. Obviously, a separation of both is the preferable choice, but comes with the challenge of effective protection of the low voltage (LV) sensitive input nodes of the recorder. A high voltage (HV) transistor used as a switch between the two parts enables different supply voltages for stimulator and recorder. Thus, a high current stimulator with high VC can be combined with a high efficient LV neural recorder. The presented implementation shows a stimulator with a maximum stimulation current of ±15mA with 5-bit resolution out of a 15V supply. The recording part consists of a LNA with a VCM of 7.5V and a supply voltage of ±1.65V around VCM - VDDLNA=9.15V and VSSLNA=5.85V. It consumes only 11.8μW and achieves an input referred root-mean-square (RMS) noise of 5.5μV in the frequency band of 1Hz to 100kHz. The design is implemented and simulated in a 0.18μm HV technology.
%0 Conference Paper
%1 6571865
%A Bihr, U.
%A Ungru, T.
%A Xu, H.
%A Anders, J.
%A Becker, J.
%A Ortmanns, M.
%B 2013 IEEE International Symposium on Circuits and Systems (ISCAS)
%D 2013
%K neural recording stimulator BMI biomedical HV from:jens.anders
%P 401-404
%R 10.1109/ISCAS.2013.6571865
%T A bidirectional neural interface with a HV stimulator and a LV neural amplifier
%U https://ieeexplore.ieee.org/document/6571865/
%X This paper shows a neural stimulator with 15V supply voltage combined with a neural low-noise amplifier (LNA) with a supply of ±1.65V around the common mode voltage (VCM) of 7.5V. In most implementations, the stimulator and recorder use the same supply domain, thus either leading to low voltage compliance (VC) for the stimulator or to high power consumption in the recorder. Obviously, a separation of both is the preferable choice, but comes with the challenge of effective protection of the low voltage (LV) sensitive input nodes of the recorder. A high voltage (HV) transistor used as a switch between the two parts enables different supply voltages for stimulator and recorder. Thus, a high current stimulator with high VC can be combined with a high efficient LV neural recorder. The presented implementation shows a stimulator with a maximum stimulation current of ±15mA with 5-bit resolution out of a 15V supply. The recording part consists of a LNA with a VCM of 7.5V and a supply voltage of ±1.65V around VCM - VDDLNA=9.15V and VSSLNA=5.85V. It consumes only 11.8μW and achieves an input referred root-mean-square (RMS) noise of 5.5μV in the frequency band of 1Hz to 100kHz. The design is implemented and simulated in a 0.18μm HV technology.
@inproceedings{6571865,
abstract = {This paper shows a neural stimulator with 15V supply voltage combined with a neural low-noise amplifier (LNA) with a supply of ±1.65V around the common mode voltage (VCM) of 7.5V. In most implementations, the stimulator and recorder use the same supply domain, thus either leading to low voltage compliance (VC) for the stimulator or to high power consumption in the recorder. Obviously, a separation of both is the preferable choice, but comes with the challenge of effective protection of the low voltage (LV) sensitive input nodes of the recorder. A high voltage (HV) transistor used as a switch between the two parts enables different supply voltages for stimulator and recorder. Thus, a high current stimulator with high VC can be combined with a high efficient LV neural recorder. The presented implementation shows a stimulator with a maximum stimulation current of ±15mA with 5-bit resolution out of a 15V supply. The recording part consists of a LNA with a VCM of 7.5V and a supply voltage of ±1.65V around VCM - VDDLNA=9.15V and VSSLNA=5.85V. It consumes only 11.8μW and achieves an input referred root-mean-square (RMS) noise of 5.5μV in the frequency band of 1Hz to 100kHz. The design is implemented and simulated in a 0.18μm HV technology.},
added-at = {2020-10-12T15:57:22.000+0200},
author = {{Bihr}, U. and {Ungru}, T. and {Xu}, H. and {Anders}, J. and {Becker}, J. and {Ortmanns}, M.},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2c1b1e8f2dad59308e2658e9598e9fd6b/iis},
booktitle = {2013 IEEE International Symposium on Circuits and Systems (ISCAS)},
doi = {10.1109/ISCAS.2013.6571865},
interhash = {b48180f5dd7e4d9428a5f8295b639cd5},
intrahash = {c1b1e8f2dad59308e2658e9598e9fd6b},
issn = {2158-1525},
keywords = {neural recording stimulator BMI biomedical HV from:jens.anders},
month = may,
pages = {401-404},
timestamp = {2020-10-12T13:57:22.000+0200},
title = {A bidirectional neural interface with a HV stimulator and a LV neural amplifier},
url = {https://ieeexplore.ieee.org/document/6571865/},
year = 2013
}
