%0 Journal Article %1 journals/vlsisp/WangMCCPJR10 %A Wang, Yongtao %A Mahmoodi, Hamid %A Chiou, Lih-Yih %A Choo, Hunsoo %A Park, Jongsun %A Jeong, Woopyo %A Roy, Kaushik %D 2010 %J Signal Processing Systems %K dblp %N 2 %P 125-137 %T Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp58.html#WangMCCPJR10 %V 58

@article{journals/vlsisp/WangMCCPJR10, added-at = {2019-12-27T00:00:00.000+0100}, author = {Wang, Yongtao and Mahmoodi, Hamid and Chiou, Lih-Yih and Choo, Hunsoo and Park, Jongsun and Jeong, Woopyo and Roy, Kaushik}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/245010bf97faad8915a84ce897e99158e/dblp}, ee = {https://doi.org/10.1007/s11265-008-0323-2}, interhash = {e13e90f7b3c469e21bdecd5d3578b8b6}, intrahash = {45010bf97faad8915a84ce897e99158e}, journal = {Signal Processing Systems}, keywords = {dblp}, number = 2, pages = {125-137}, timestamp = {2020-01-09T07:46:30.000+0100}, title = {Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp58.html#WangMCCPJR10}, volume = 58, year = 2010 }